Implementation of TFHE on RISC-V based embedded systems

Thesis topic details

General information

Organisation

The French Alternative Energies and Atomic Energy Commission (CEA) is a key player in research, development and innovation in four main areas :
• defence and security,
• nuclear energy (fission and fusion),
• technological research for industry,
• fundamental research in the physical sciences and life sciences.

Drawing on its widely acknowledged expertise, and thanks to its 16000 technicians, engineers, researchers and staff, the CEA actively participates in collaborative projects with a large number of academic and industrial partners.

The CEA is established in ten centers spread throughout France
  

Reference

SL-DRT-26-0461  

Direction

DRT

Thesis topic details

Category

Technological challenges

Thesis topics

Implementation of TFHE on RISC-V based embedded systems

Contract

Thèse

Job description

Fully Homomorphic Encryption (FHE) is a technology that allows computations to be performed directly on encrypted data, meaning that we can process information without ever knowing its actual content. For example, it could enable online searches where the server never sees what you are looking for, or AI inference tasks on private data that remain fully confidential. Despite its potential, current FHE implementations remain computationally intensive and require substantial processing power, typically relying on high-end CPUs or GPUs with significant energy consumption. In particular, the bootstrapping operation represents a major performance bottleneck that prevents large-scale adoption. Existing CPU-based FHE implementations can take over 20 seconds on standard x86 architectures, while custom ASIC solutions, although faster, are prohibitively expensive, often exceeding 150 mm² in silicon area. This PhD project aims to accelerate the TFHE scheme, a more lightweight and efficient variant of FHE. The objective is to design and prototype innovative implementations of TFHE on RISC-V–based systems, targeting a significant reduction in bootstrapping latency. The research will explore synergies between hardware acceleration techniques developed for post-quantum cryptography and those applicable to TFHE, as well as tightly coupled acceleration approaches between RISC-V cores and dedicated accelerators. Finally, the project will investigate the potential for integrating a fully homomorphic computation domain directly within the processor’s instruction set architecture (ISA).

University / doctoral school

Sciences et Technologies de l’Information et de la Communication (STIC)
Paris-Saclay

Thesis topic location

Site

Grenoble

Requester

Position start date

01/10/2026

Person to be contacted by the applicant

VALEA Emanuele emanuele.valea@cea.fr
CEA
DRT/DSCIN/LFIM

Tutor / Responsible thesis director

SIRDEY Renaud renaud.sirdey@cea.fr
CEA
DRT/DSCIN/DSCIN/LCYL
CEA Saclay Nano-INNOV
Institut CARNOT CEA LIST
DRT/LIST/DSCIN/LCYL
Point courrier n° 172
F-91191 Gif-sur-Yvette Cedex
01 69 08 45 42

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