Ferroelectric Field Effect Transistors FeFET is a valuable high-density memory component suitable for 3D DRAM. FeFET concept combines oxide semiconductors SCO as canal material and ferroelectric metal oxides FE as transistor gate [2, 3]. Atomic layer deposition ALD of SCO and FE materials at ultrathin thickness level (<10 nm) and low temperature (<300°C) are highly suitable for BEOL 3D DRAM structures.
The thesis project emphasis on the development of indium-based SCO layers with ultra-high mobility (>10 cm2.Vs); ultrathin (<5nm) and ultra-conformal (aspect ratio 1:10). The PhD student will beneficiate from the rich technical environment of the 300/200mm CEA-LETI clean-room and the nano-characterization platform (physico-chemical, structural and microscopy analysis, electrical measurements).
The developments will focus on the following items:
1-Comparison of SCO layers (IGZO Indium Gallium Zinc Oxide) fabricated using ALD and PVD techniques: implementation of adapted mesurements techniques and test vehicles
2-Intrinsec and electrical characterization of ALD-SCO (IWO, IGZO, InO) and ALD-EF (HZO) layers: stoichiometry, structure, resistivity, mobility….
3-Co-integration of ALD-SCO and ALD-FE layers for vertical and horizontal 3D FeFET structures



[1]10.35848/1347-4065/ac3d0e
[2]https://doi.org/10.1109/TED.2023.3242633
[3]https://doi.org/10.1021/acs.chemmater.3c02223