General information
Organisation
The French Alternative Energies and Atomic Energy Commission (CEA) is a key player in research, development and innovation in four main areas :
• defence and security,
• nuclear energy (fission and fusion),
• technological research for industry,
• fundamental research in the physical sciences and life sciences.
Drawing on its widely acknowledged expertise, and thanks to its 16000 technicians, engineers, researchers and staff, the CEA actively participates in collaborative projects with a large number of academic and industrial partners.
The CEA is established in ten centers spread throughout France
Reference
SL-DRT-26-0631
Direction
DRT
Thesis topic details
Category
Technological challenges
Thesis topics
Sofware support for computing accelerators and memory transferts accelerators
Contract
Thèse
Job description
For energy reasons, future computers will have to use accelerators for both computation and memory access (GPUs, TPUs, NPUs, smart DMAs). AI applications have intensive computational requirements in terms of both computing power and memory throughput.
These accelerators are not based on a simple instruction set (ISA), they break the Von Neuman model: they require specialized code to be written manually.
Furthermore, it is difficult to compare the use of these accelerators with code using a non-specialized processor, as the initial source codes are very different.
HybroLang is a hardware-close programming language that allows programs to be written using all of a processor's computing capabilities, while also allowing code to be specialized based on data known at runtime.
The HybroGen compiler has already demonstrated its ability to program in-memory computing accelerators, as well as to optimize code on conventional CPUs by performing innovative optimizations.
This thesis proposes to extend the HybroLang language in order to
- facilitate the programming of AI applications by providing support for complex data: stencils, convolution, sparse computing
- enable code generation both on CPUs and with hardware accelerators currently under development at the CEA (sparse computing, in-memory computing, memory access)
- allow to benchmark different computing architectures with the same initial source code
Ideally, a candidate should have knowledge of computer architecture, programming language implementation, code optimization and compilation.
University / doctoral school
Mathématiques, Sciences et Technologies de l’Information, Informatique (MSTII)
Université Grenoble Alpes
Thesis topic location
Site
Grenoble
Requester
Position start date
01/09/2026
Person to be contacted by the applicant
CHARLES Henri-Pierre
Henri-Pierre.Charles@cea.fr
CEA
DRT/DSCIN/DSCIN/LFIM
MINATEC Campus
17 rue des Martyrs
38054 Grenoble Cedex 9
+33 438 789 699
Tutor / Responsible thesis director
RASTELLO Fabrice
fabrice.rastelo@inria.fr
INRIA
LIG/CORSE
3 Parv. Louis Néel
38000 Grenoble
En savoir plus
https://blog.hpch.net/