Artificial Intelligence (AI) increasingly powers safety-critical systems that demand robust, energy-efficient computation, often in environments marked by data scarcity and uncertainty. However, conventional AI approaches struggle to quantify confidence in their predictions, making them prone to unreliable or unsafe decisions.

This thesis contributes to the emerging field of Bayesian electronics, which exploits the intrinsic randomness of novel nanodevices to perform on-device Bayesian computation. By directly encoding probability distributions at the hardware level, these devices naturally enable uncertainty estimation while reducing computational overhead compared to traditional deterministic architectures.

Previous studies have demonstrated the promise of memristors for Bayesian inference. However, their limited endurance and high programming energy pose significant obstacles for on-chip learning applications.

This thesis proposes the use of ferroelectric memory field-effect transistors (FeMFETs)—which offer nondestructive readout and high endurance—as a promising alternative for implementing Bayesian neural networks.