General information
Organisation
The French Alternative Energies and Atomic Energy Commission (CEA) is a key player in research, development and innovation in four main areas :
• defence and security,
• nuclear energy (fission and fusion),
• technological research for industry,
• fundamental research in the physical sciences and life sciences.
Drawing on its widely acknowledged expertise, and thanks to its 16000 technicians, engineers, researchers and staff, the CEA actively participates in collaborative projects with a large number of academic and industrial partners.
The CEA is established in ten centers spread throughout France
Reference
SL-DRT-24-0823
Direction
DRT
Thesis topic details
Category
Technological challenges
Thesis topics
Secure Hardware/Software Implementation of Post-Quantum Cryptography on RISC-V Platforms
Contract
Thèse
Job description
Traditional public-key cryptography algorithms are considered broken when a large-scale quantum computer is successfully realized. Consequently, the National Institute of Standards and Technology (NIST) in the USA has launched an initiative to develop and standardize new Post-Quantum Cryptography (PQC) algorithms, aiming to replace established public-key mechanisms. However, the adoption of PQC algorithms in Internet of Things (IoT) and embedded systems poses several implementation challenges, including performance degradation and security concerns arising from the potential susceptibility to physical Side-Channel Attacks (SCAs).
The idea of this Ph.D. project is to explore the modularity, extensibility and customizability of the open-source RISC-V ISA with the goal of proposing innovative, secure and efficient SW/HW implementations of PQC algorithms. One of the main challenge related to the execution of PQC algorithms on embedded processors is to achieve good performance (i.e. low latency and high throughput) and energy efficiency while incorporating countermeasures against physical SCAs. In the first phase, the Ph.D. candidate will review the State-Of-the-Art (SoA) with the objective of understanding weaknesses and attack points of PQC algorithms, the effectiveness and overhead of SoA countermeasures, and SoA acceleration strategies. In the second phase, the candidate will implement new solutions by exploiting all degrees of freedom offered by the RISC-V architecture and characterize the obtained results in terms of area overhead, execution time and resistance against SCAs.
Beyond the exciting scientific challenges, this PhD will take place in Grenoble, a picturesque city nestled in the French Alps. The research will be conducted at the CEA, in LETI and LIST institutes, and in collaboration with the TIMA laboratory.
University / doctoral school
Electronique, Electrotechnique, Automatique, Traitement du Signal (EEATS)
Université Grenoble Alpes
Thesis topic location
Site
Grenoble
Requester
Position start date
01/09/2024
Person to be contacted by the applicant
DI MATTEO Stefano stefano.dimatteo@cea.fr
CEA
DRT/DSYS/SSSEC/LSCO
Tutor / Responsible thesis director
DI NATALE Giorgio giorgio.di-natale@univ-grenoble-alpes.fr
TIMA - CNRS / Université Grenoble-Alpes / Grenoble INP
Département de Microélectronique
46, avenue Félix Viallet
38031 Grenoble Cedex France
04.76.57.49.88
En savoir plus
https://list.cea.fr/en/
https://www.leti-cea.com/cea-tech/leti/english